InterruptsAn interrupt is break in execution that occurs when either the system state needs to be update or recovered or a hardware device needs to be controlled. Some interrupts, when triggered, invoke a subroutine-called an ISR (Interrupt Service Routine) or interrupt handler-so that code can be run to notify the program that an interrupt has taken place. This interrupt handler must be careful to preserve both all register contents and flags. There is a special instruction that will pop the flags as well as the program counter from the stack when executed: the instruction RTE should be used in place of RTS at the end of an ISR.Auto InterruptsThe first kind of interrupt is one triggered by a clock to run at certain frequency or by a hardware device. Software has no control over when this interrupt will occur. Grayscale, for instance, is based on an auto interrupt that occurs roughly at 350 Hz. There are seven of these auto interrupts, named auto interrupts 1-7. When a certain auto interrupt is triggered, the address of the ISR is taken from one of the following memory addresses, respectively:auto interrupt 1 - $64 auto interrupt 2 - $68 auto interrupt 3 - $6c auto interrupt 4 - $70 auto interrupt 5 - $74 auto interrupt 6 - $78 auto interrupt 7 - $7c When an assembly program is run, the TI-OS interrupt handlers are enabled; to change any one of these, load a new pointer into the correct address as listed above. However, since the memory from $000 to $128 is protected, you must first reset bit 2 of port $600001, and afterwards, it would be wise to set the bit again. Here are the functions of each of these auto interrupts:
Trap InterruptsThe second kind of interrupt is one triggered by software, and these are called trap interrupts. There are 16 trap interrupts called traps 0-15 that are invoked by the instruction trap #x, where x is the trap interrupt number you wish to invoke. On the 68000, these are usually supervisor programs that perform functions that cannot be done in user mode. To change the location of a trap interrupt handler, change the pointer at the appropriate RAM addresses according to the following table, again resetting bit 2 of ($600001):trap 0 - $80 trap 1 - $84 trap 2 - $88 trap 3 - $8c trap 4 - $90 trap 5 - $94 trap 6 - $98 trap 7 - $9c trap 8 - $a0 trap 9 - $a4 trap 10 - $a8 trap 11 - $ac trap 12 - $b0 trap 13 - $b4 trap 14 - $b8 trap 15 - $bc TI-OS uses the following trap routines; the others are unused:
Disabling InterruptsAll auto interrupts can be disabled using the status register and trap 1. Bits 10, 9 and 8 of SR represent the lowest interrupt priority to be enabled (auto interrupt 1has the highest priority, auto interrupt 7 has the lowest priority). So, if these bits are %011 (4) respectively, then only the auto interrupts 5, 6 and 7 will be enabled. For example, then, to disable all the interrupts, you would execute the following:move.w #$0700,d0 ;set bits 8,9 and 10 trap #1 ;put d0.w into SR move.w d0,oldSR ;save old SR Other InterruptsThere is another kind of trap interrupt called an exception. This occurs after an instruction performs an illegal operation, such as accessing an odd address of memory with a word or longword, dividing by zero, or executing a nonexistent opcode.All interrupts use what's called an interrupt vector table to look up the location of the ISR. Here is a table of all these locations:
For example code showing how to implement an auto interrupt, see the grayscale tutorial. That about covers interrupts on the 89 ... happy coding ;-)
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